1. Field of the Invention
The present invention relates to a method for fabricating thin film transistors and, more particularly, to a method for fabricating low temperature poly-silicon (LTPS) thin film transistors.
2. Description of Related Art
Currently, numerous researchers from various fields focus on developing low temperature poly-Si thin film transistor liquid crystal displays (LTPS TFT-LCDs). In comparison to conventional a-Si TFT-LCDs, the process for fabricating LTPS TFT-LCDs is more complex and more masks are necessary. However, the area of the transistors used in LTPS TFT-LCDs have reduced due to enhanced electron mobility such that the aperture ratio of LTPS TFT-LCDs is increased and the resolution is enhanced. Nowadays, LTPS TFT-LCDs have been applied in high-leveled, medium- and small-scaled products.
FIGS. 1A to 1G show the method for fabricating conventional low temperature poly-silicon (LTPS) thin film transistors.
With reference to FIG. 1A, a poly-silicon layer is first formed on a substrate 100 by laser annealing, and the poly-silicon layer is patterned to define driver areas 102 via a first mask. The driver areas 102 were disposed in a first transistor area (NMOS) 104 and a second transistor area (PMOS) 106. Subsequently, as shown in FIG. 1B, a channel 108 is formed by performing ion doping via a second mask, and a gate insulating layer 110 is formed over the driver areas 102. Then, as shown in FIG. 1C, N+ doping regions 112 are formed by performing ion doping via a third mask. Next, a gate metal layer is formed by sputtering and gate electrodes 114 are defined via a fourth mask, as shown in FIG. 1D. After forming the gate electrodes 114, P+ doping regions 116 of the second transistor (PMOS) are formed by performing ion doping via a fifth mask, as shown in FIG. 1E. Subsequently, as shown in FIG. 1F, a silicon dioxide (SiO2) film 118 is deposited, and contact holes 120 are formed in the first transistor area (NMOS) 104 and the second transistor area (PMOS) 106 via a sixth mask. Source/drain electrodes 122 are defined via a seventh mask, as shown in FIG. 1G. Finally, contact holes are formed in a passivation layer via an eighth mask, and pixel electrodes (not shown in the figures) are defined via a ninth mask. Accordingly, conventional low temperature poly-silicon (LTPS) thin film transistors are afforded.
However, the above-mentioned method for fabricating conventional low temperature poly-silicon (LTPS) thin film transistors needs many masks, and thus it has disadvantages of high cost and alignment shift between mask steps. Thereby, it is important in the art to reduce the number of used masks and improve alignment shift.